The LTC3717 is a synchronous step-down switching regulator controller for double data rate (DDR) and Quad Data Rate (QDR) memory termination. The controller uses a valley current control architecture to deliver very low duty cycles without requiring a sense resistor. Operating frequency is selected by an external resistor and is compensated for variations in VIN. Forced continuous operation reduces noise and RF interference. Output voltage is internally set to half of VREF, which is user programmable. Fault protection is provided by an output overvoltage comparator and optional short-circuit shutdown timer. Soft-start capability for supply sequencing is accomplished using an external timing capacitor. The regulator current limit level is symmetrical and user programmable. Wide supply range allows operation from 4V to 36V at the VCC input.
